Bibliography

Electronic Document

Lattice IP Core used in Real-time Lattice Demo on XESS Board. (Program)

Pohl Zdeněk, Kadlec Jiří, Líčko Miroslav, Matoušek Rudolf, Tichý Milan

: ÚTIA AV ČR, (Praha 2003)

: CEZ:AV0Z1075907

: RLS Lattice, FPGA, noise cancelation

(eng): A demo for XSV-800 board from XESS corporation. A 10-bit logarithmic arithmetic is used for implementation of a high performance DSP application. It is performing noise cancelation for audio signals from audiocodec inputs and wieting output to the audio output. The demo is possible to be downloaped from the UTIA website.

: 09G, 09H

: JC