Bibliography

Conference Paper (Czech conference)

Pipelined logarithmic 32bit ALU for Celoxica DK1

Heřmánek Antonín, Kadlec Jiří, Matoušek Rudolf, Líčko Miroslav, Pohl Zdeněk

: Sborník příspěvků 9.ročníku konference MATLAB 2001, p. 72-80 , Eds: Procházka A., Uhlíř J.

: VŠCHT, (Praha 2001)

: MATLAB 2001 /9./, (Praha, CZ, 11.10.2001)

: AV0Z1075907

(eng): This paper presents and compares two possible solution for floating point-like HW, based on a 32bit logarithmic ALU. There are described the implementation, parametres nad the basic use of a non-pipelined ALU. Both Virtex FPGA cores are encapsulated in function like API interface compatible with Handel-C 2.1 and the new DK1 tool from Celoxica.

: 09G

: JC