Bibliografie

Conference Paper (international conference)

Logarithmic number system and floating-point arithmetics on FPGA

Matoušek Rudolf, Tichý Milan, Pohl Zdeněk, Kadlec Jiří, Softley C.

: Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream, p. 627-636 , Eds: Glesner M., Zipf P., Renovell M.

: Springer, (Berlin 2002)

: International Conference FPL 2002 /12./, (Montpellier, FR, 02.09.2002-04.09.2002)

: CEZ:AV0Z1075907

: 33544, ESPRIT, LN00B096, GA MŠk

: LNS, DSP, QRD, FPGA, HSLA, FPU

(eng): This work has demonstrated that it is possible to design a LNS arithmetic core library of a practical word length. All main arithmetic algorithms were shown. A small case study has shown that for some applications provides the LNS solution substantially better performance while consuming a comparable area. The strengths of the LNS lies in fast multiplications, divisions, squares and square roots. It allows us to implement algorithms that are not suitable for pipelining.

: 09G, 09H

: JC