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Bibliography

Conference Paper (Czech conference)

Logarithmic number system and floating-point arithmetics an FPGA

Pohl Zdeněk

: Počítačové Architektury & Diagnostika PAD 2003, p. 9-16 , Eds: Kotásek Z., Růžička R., Sekanina L.

: VUT, (Brno 2003)

: PAD 2003 Počítačové Architektury & Diagnostika, (Zvíkovské Podhradí, CZ, 24.09.2003-26.09.2003)

: CEZ:AV0Z1075907

: 33544, ESPRIT

: LNS arithmetic, floating-point, FPGA

(eng): An introduction to a logarithmic number system (LNS) is presented. Range and procision of this arithmetic is briefly discussed. We show that the LNS arithmetics is suitable for a FPGA implementation. A case study will compare parameters of our LNS arithmetic library to a conventional floating-point arithmetic.

: 09G, 09H

: JC